Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Slew Rate | Bank | Pin Number | Pin Type | Pin Use | Reg Use | I/O Std | I/O Style | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
EOP | 2 | 3 | FB2 | MC1 | FAST | 2 | 2 | I/O/GTS2 | O | DFF | LVCMOS18 | RESET | |
Chip2/Chip2/present_state<1> | 3 | 5 | FB2 | MC14 | 2 | 9 | I/O | I | DFF | KPR | RESET | ||
Chip2/Chip2/present_state<2> | 3 | 5 | FB2 | MC15 | 2 | 10 | I/O | I | DFF | KPR | RESET | ||
S<3> | 2 | 3 | FB1 | MC14 | FAST | 2 | 137 | I/O | O | DFF | LVCMOS18 | RESET | |
S<2> | 2 | 3 | FB1 | MC13 | FAST | 2 | 138 | I/O | O | DFF | LVCMOS18 | RESET | |
S<1> | 2 | 3 | FB1 | MC12 | FAST | 2 | 139 | I/O | O | DFF | LVCMOS18 | RESET | |
S<0> | 2 | 3 | FB1 | MC6 | FAST | 2 | 140 | I/O | O | DFF | LVCMOS18 | RESET | |
Cout | 2 | 3 | FB1 | MC4 | FAST | 2 | 142 | I/O | O | DFF | LVCMOS18 | RESET | |
Chip2/QB<0> | 3 | 5 | FB1 | MC3 | 2 | 143 | I/O/GSR | GSR | DFF | KPR | RESET | ||
Chip2/Chip1/present_state<3> | 2 | 4 | FB1 | MC1 | (b) | (b) | RESET | ||||||
Chip2/Chip1/present_state<2> | 3 | 5 | FB1 | MC2 | (b) | (b) | RESET | ||||||
Chip2/Chip1/present_state<1> | 3 | 5 | FB1 | MC5 | (b) | (b) | RESET | ||||||
Chip2/QA<0> | 3 | 5 | FB1 | MC7 | (b) | (b) | RESET | ||||||
CE | 1 | 1 | FB1 | MC8 | (b) | (b) | RESET | ||||||
Chip2/QC<0> | 2 | 4 | FB1 | MC9 | (b) | (b) | RESET | ||||||
Chip2/QW<3> | 4 | 5 | FB1 | MC10 | (b) | (b) | RESET | ||||||
Chip2/QW<2> | 2 | 3 | FB1 | MC11 | (b) | (b) | RESET | ||||||
Chip2/QW<1> | 2 | 3 | FB1 | MC15 | (b) | (b) | RESET | ||||||
Chip2/QW<0> | 2 | 3 | FB1 | MC16 | (b) | (b) | RESET | ||||||
Chip2/Chip2/present_state<3> | 2 | 4 | FB2 | MC2 | (b) | (b) | RESET | ||||||
LDW | 2 | 5 | FB2 | MC6 | (b) | (b) | RESET | ||||||
Chip2/Chip9/present_state<1> | 2 | 4 | FB2 | MC7 | (b) | (b) | RESET | ||||||
LDS | 1 | 4 | FB2 | MC8 | (b) | (b) | RESET | ||||||
Chip2/Chip9/present_state<0> | 2 | 3 | FB2 | MC9 | (b) | (b) | RESET | ||||||
Chip2/Chip9/present_state<2> | 1 | 2 | FB2 | MC10 | (b) | (b) | RESET | ||||||
LDA<1> | 1 | 2 | FB2 | MC11 | (b) | (b) | RESET | ||||||
Chip1/present_state_FSM_FFd6 | 2 | 3 | FB2 | MC16 | (b) | (b) | SET |