Design Name | Adder_4bit_serial |
Fitting Status | Successful |
Software Version | P.68d |
Device Used | XC2C256-7-TQ144 |
Date | 11-29-2013, 2:11PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
27/256 (11%) | 58/896 (7%) | 27/256 (11%) | 17/118 (15%) | 40/640 (7%) |
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Signal mapped onto global clock net (GCK1) | CLK |
Signal mapped onto global output enable net (GSR) | CD |