UPC EETAC Bachelor's Degree in Telecommunications Systems and in Network Engineering EEL

 

 

The concept of incomplete logic functions

L2.5 


Most of the circuits require their truth table to be completed, meaning that we like to set an output value '1' or '0' for every single input combination. But for some applications such is not the case. For some circuits, we don't need to specify completely the truth table, perhaps because some input combinations are physically impossible or because some inputs will never happen under normal conditions.

Tank level meter

1.- Specifications

Tank level meter

Fig.1. This device, a tank level meter build using digital optical sensors (1), (2) attached to  the tank wall also has a particular truth table because the sensors generates a '1' when covered in water. 

 

 truth table

Fig.2. Truth table definition with 120 combinations where the code is not necessary because the error condition will be displayed instead. This circuit has an incomplete truth table.

 

2.- Planning

We can choose to design two projects based on:

- Plan A, equations. For instance copying the truth table in minilog format and minimise SoP or SoP. Project location:

C:\CSD\P2\Tank_level_meterA\(files)


- Plan B, truth table. For instance, drawing an schematic like this one in Fig. 3. 

Tank_level_meter_schematic

Fig.3. Schematic to write the VHDL file using plan B.  

 Project location:

C:\CSD\P2\Tank_level_meterB\(files)

3.- Development

Plan A. This is the truth table in minilog format Tank_level_meter.tbl, so that for example the PoS equations can be obtained and translated to VHDL in this file Tank_level_meter.vhd.


Plan B. The Tank_level_meter.vhd.

Example of an RTL view, and a technology view representing the synthesised circuit.

4.- Test

An example testbench file Tank_level_meter_tb.vhd

An example of timing diagram.

 


Another example of incomplete logic function is this decoder BCD to 7segment D1.2.