Digital Circuits and Systems (CSD - digsys) |
Learning outcomes and organisation |
Chapter 1 | Chapter 2 | Chapter 3 | |||||||||
Combinational circuits | Sequential systems | Microcontrollers | |||||||||
P12: Peripherals: timers, A/D, etc. | |||||||||||
P11: Peripherals: LCD display. | |||||||||||
P10: Implementing FSM in C language. Interrupts. | |||||||||||
P9: Microcontroller architecture. Digital I/O. | |||||||||||
P8: Dedicated processors: datapath, control unit and CLK generators. | |||||||||||
P7: Standard sequential systems: counters, data and shift registers. | |||||||||||
P6: Finite state machines (FSM): synchronous canonical sequential systems. | |||||||||||
P5: 1-bit memory cells. Analysis of circuits based on latches and flip-flops. | |||||||||||
P4: Standard arithmetic circuits (integers in 2C), add, subt, ALU. Propagation time, speed, power. | |||||||||||
P3: Standard arithmetic circuits (radix-2): add, comp, mult, etc. Structural/hierarchical VHDL (plan C2). | |||||||||||
P2: Standard logic circuits: mux, demux, dec, enc, etc. Flat VHDL: logic equations (plan A), behavioural (plan B). | |||||||||||
P1: Logic gates and Boolean algebra. Analysis and design: schematics, truth table, minterms, maxterms, SoP, PoS. | |||||||||||
Cross-curricular skills Atenea | |||||||||||
This CSD course is intended for EETAC students and anyone who wants to learn about systematic digital circuit design.